Testing and Design for Testability

Synopsis

Teaching and learning material covering an understanding and appreciation of how to apply the principles and established procedures for testing and designing testable electronic systems, and the concept of testing and design for testability being as integral as the design process as considerations regarding performance and functionality. Offers an overview of circuit failure modes, the testing process and types of automatic test equipment (ATE) and methods for automatic test pattern generation (ATPG), fault modelling and fault simulation. Design for testability techniques. For use to complement traditional methods of teaching and learning. Comprises approximately 30 hours of teaching material.

Series

Edec: A Computer-Based Teaching System for Electronic Design Education, Tltp Project

Language

English

Country

Great Britain

Year of production

1995

Availability

Free (from server)

Notes

Available to UK higher education institutions.

Uses

Advancedlevel electrical and electronic engineering and computer science courses.

Subjects

Engineering

Keywords

computer science; electrical and electronic engineering; engineering design; engineering teaching; Teaching & Learning Technology Programme; testing

Distributor

Name

UMIST, Department of Electrical Engineering and Electronics

Phone

0161-200 4702

Fax

URL: http:/edec.ee.umist.ac.uk

Address

PO Box 88
Manchester
M60 1QD

Notes

contact: Professor Peter J Hicks, EDEC TLTP Project